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Complete, Direct-Conversion Tuner for DVB-S
and Free-to-Air Applications
3-Bit ADC
The MAX2120 has an internal 3-bit ADC connected to
the VCO tune pin (VTUNE). This ADC can be used for
checking the lock status of the VCOs.
Table 15 summarizes the ADC trip points, and the VCO
lock indication. The VCO autoselect routine will only
select a VCO in the “VAS locked” range. This allows
room for a VCO to drift over temperature and remain in
a valid “locked” range.
The ADC must first be enabled by setting the ADE bit in
the VCO register. The ADC reading is latched by a sub-
sequent programming of the ADC latch bit (ADL = 1).
The ADC value is reported in the Status Byte-2 register
(see Table 13).
Table 15. ADC Trip Points and Lock Status
Standby Mode
The MAX2120 features normal operating mode and
standby mode using the I 2 C interface. Setting a logic-
high to the PWDN bit in the Control register enables
power-down. In this mode, all circuitries except for the 2-
wire-compatible bus are disabled, allowing for program-
ming of the MAX2120 registers while in power-down.
In all cases, register settings loaded prior to entering
shutdown are saved upon transition back to active
mode. Default register values are provided for the
user’s convenience only. It’s the user’s responsibility to
load all the registers no sooner than 100μs after the
device is powered up.
Layout Considerations
The MAX2120 EV kit serves as a guide for PCB
layout. Keep RF signal lines as short as possible to mini-
ADC[2:0]
000
001
010
101
110
111
LOCK STATUS
Out of Lock
Locked
VAS Locked
VAS Locked
Locked
Out of Lock
mize losses and radiation. Use controlled impedance on
all high-frequency traces. For proper operation, the
exposed paddle must be soldered evenly to the board’s
ground plane. Use abundant vias beneath the exposed
paddle for maximum heat dissipation. Use abundant
ground vias between RF traces to minimize undesired
coupling. Bypass each V CC pin to ground with a 1nF
capacitor placed as close as possible to the pin.
18
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